Design and Analysis of the Reduction of Harmonics at Inverter Output

Abstract

The aim of this thesis is to present a technique to reduce harmonics in output voltage of singll phase inverters. The thesis explains how harmonics is one of the most dangerous threats for the, appliances. The thesis also deals with the technique to reduce harmonics. A circuit based paralleling of two invertors by using interface reactors is investigated. The interface reactor is thls harmonic reducing element. Sine Pulse-width modulation is used to generate the gating signal: of the inverters. There is a phase difference between the gating signals of parallel branches. By varying the phase difference, an analysis is done to find the best situation when maximum harmonic elements can be reduced. Another two analyses are done by varying frequency ratio and modification index. A conclusion is made about the finest modulation index depending 01 BMS value of fundamental component and presence of 3rd, 5th th harmonic components between frequency ratio and specific harmonic components is also studied. It is possible, eliminate all harmonics up to a certain limit by setting the frequency ratio. An equation i: elimited for that. Analysis is carried out by using MA TLAB and PSPICE software.