Modeling of drain current for graphene channel G4FET and gate-all-around MOSFET

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dc.contributor.advisorRahman, Hamidur
dc.contributor.authorRakibul Alam, Md.
dc.date.accessioned2020-01-12T04:06:51Z
dc.date.available2020-01-12T04:06:51Z
dc.date.issued2018-12-01
dc.description.abstractThe structure of Graphene channel Four Gate Field Effect Transistor (G4-FET) and Gate-All-Around (GAA) MOSFET have been developed in 3D ATLAS simulator of SILVACO in this thesis. Drain current of Graphene channel G4-FET and GAA MOSFET are calculated and compared in this study. The performance of the devices has also been investigated in this article. An optimized structure is designed for the performance matrix such as threshold voltage, Subthreshold Swing (SS), Drain Induced Barrier Lowering (DIBL), transconductance etc. and the results are compared with existing FET structure in this paper.
dc.identifier.otherhttp://lib.buet.ac.bd:8080/xmlui/handle/123456789/5448
dc.identifier.urihttp://lib.buet.ac.bd:8080/xmlui/handle/123456789/5448
dc.language.isoen
dc.publisherDepartment of Electrical and Electronic Engineering (EEE), BUET
dc.sourceBUET Institutional Repository
dc.subjectMOSFET
dc.titleModeling of drain current for graphene channel G4FET and gate-all-around MOSFET
dc.typeThesis-MSc

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