Modeling of drain current for graphene channel G4FET and gate-all-around MOSFET

Abstract

The structure of Graphene channel Four Gate Field Effect Transistor (G4-FET) and Gate-All-Around (GAA) MOSFET have been developed in 3D ATLAS simulator of SILVACO in this thesis. Drain current of Graphene channel G4-FET and GAA MOSFET are calculated and compared in this study. The performance of the devices has also been investigated in this article. An optimized structure is designed for the performance matrix such as threshold voltage, Subthreshold Swing (SS), Drain Induced Barrier Lowering (DIBL), transconductance etc. and the results are compared with existing FET structure in this paper.