Browsing by Author "Kitamaru, D."

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    The Surface-Potential-Based model HiSIM-SOI and its Application to 1/f Noise in Fully-Depleted SOI-MOSFETs
    (Nano Science and Technology Institute (NSTI), 2005-05-08) Sadachika, N.; Yusoff, M. M; Uetsuji, Y.; Bhuyan, Muhibul Haque; Kitamaru, D.; Mattausch, H. J.; Miura-Mattausch, M.
    The fully-depleted SOI-MOSFET model HiSIM-SOI for circuit simulation is the first model for circuit simulation based on a complete surface-potential description. HiSIM-SOI solves the surface potentials at all three SOI-surfaces perpendiculars to the channel surface self-consistently. Besides, verification against measured I-V characteristics, HiSIM-SOI is also verified with a 1/f noise analysis, sensitive to the carrier concentration and distribution along the channel. During the noise analysis, it was found that the carrier concentration increase in SOI-MOSFET leads to an enhanced 1/f noise in comparison with the bulk-MOSFET. Therefore, HiSIM-SOI predicts that further reduction of the silicon-layer thickness necessary for achieving higher driving capability will cause unavoidable noise enhancement.