The Surface-Potential-Based model HiSIM-SOI and its Application to 1/f Noise in Fully-Depleted SOI-MOSFETs
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Date
2005-05-08
Journal Title
Journal ISSN
Volume Title
Publisher
Nano Science and Technology Institute (NSTI)
Abstract
The fully-depleted SOI-MOSFET model HiSIM-SOI for circuit simulation is the first model for circuit simulation based on a complete surface-potential description. HiSIM-SOI solves the surface potentials at all three SOI-surfaces perpendiculars to the channel surface self-consistently. Besides, verification against measured I-V characteristics, HiSIM-SOI is also verified with a 1/f noise analysis, sensitive to the carrier concentration and distribution along the channel. During the noise analysis, it was found that the carrier concentration increase in SOI-MOSFET leads to an enhanced 1/f noise in comparison with the bulk-MOSFET. Therefore, HiSIM-SOI predicts that further reduction of the silicon-layer thickness necessary for achieving higher driving capability will cause unavoidable noise enhancement.
Description
This was a poster paper.
Keywords
HiSIM-SOI, SOI-MOSFET, Surface Potential, SP-based Model, 1/f Noise, Circuit Simulation
Citation
N. Sadachika, M. M. Yusoff, Y. Uetsuji, M. H. Bhuyan, D. Kitamaru, H. J. Mattausch, M. Miura-Mattausch, L. Weiss, U. Feldmann, and S. Baba, “The Surface-Potential-Based model HiSIM-SOI and its Application to 1/f Noise in Fully-Depleted SOI-MOSFETs,” Technical Proceedings of the Workshop on Compact Modeling (WCM2005), ISBN: 0-9767985-3-0, Nano Science and Technology Institute (NSTI), URL: http://nsti.org/procs/Nanotech2005WCM/2, CA, USA, 8-12 May 2005, pp. 155-158.