Analytical Threshold Voltage Model for Pocket Implanted Fully Depleted Thin Film SOI n-MOSFET
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Date
2012-10-02
Journal Title
Journal ISSN
Volume Title
Publisher
Bangladesh Electronics and Informatics Society
Abstract
In this paper, a modified structure of the fully depleted thin film SOI n-MOSFET has been proposed by implanting symmetric pockets both at the source and drain sides. Then an analytical threshold voltage model for this proposed structure has been presented. The model has been simulated in a MATLAB environment for different pocket profile parameters and device dimensions. Simulation results reveal that the incorporation of pockets in the thin film SOI n-MOSFET can suppress the short channel effects significantly.
Description
Keywords
Pocket implanted MOS device, SOI-MOSFET, Threshold Volage, Drain Voltage, Gate Voltage, Pocket length, Pocket concentration, Thin Film, MATLAB, Simulation, SCE, RSCE
Citation
M. H. Bhuyan and Q. D. M. Khosru, “Analytical Threshold Voltage Model for Pocket Implanted Fully Depleted Thin Film SOI n-MOSFET,” Proceedings of the National Conference on Electronics and ICT for National Development organized by the Bangladesh Electronics Society, Dhaka, 3-4 October 2012, pp. 238-242.