Investigation into the testability of biCMOS logic circuits for faults in the additional MOS devices

Abstract

BiCMOS circuits are used to increase the output drive capability of CMOS circuits while retaining the inherent advantages of CMOS logic. These include the low power dissipation and high packing density of CMOS logic. The introduction of bipolar devices at the output stages of CMOS circuits increases the speed of operation. However, the existence of both MOS and bipolar devices gives rise to additional complexity in fabrication. This also results in complex failure modes and fault behaviors in BiCMOS circuits. Fault characterization of VLSI circuits is essential so that quick fault detection and recovery are possible. Although the fault characterization of conventional BiCMOS has been carried out by several researchers, that of full-swing BiCMOS logic circuits is by no means complete. Only faults in the logic MOS devices and bipolar drivers of a class of low capacitance full-swing BiCMOS circuits have so far been reported. Also, these results were not verified for various logic gates. This thesis examines the behavior of low capacitance full-swing BiCMOS logic circuits under single.stuck faults in logic MOS, additional MOS and bipolar devices. Also these faults are examined in more than one logic gate so that the behavior can be generalized.