Effect of Lightly Doped Drain on the Electrical Characteristics of CMOS Compatible Vertical MOSFETs

Abstract

CMOS compatible ion implanted vertical MOSFET has been recently demonstrated as a viable route for improving RF performance of matured CMOS technology. Unlike planar MOSFETs, in this type of devices heavily doped and lightly doped drain is provided by single implantation and anneal. For this reason depending on anneal time the depth of LDD and doping is determined which could have unavoidable effects on vertical MOSFET’s electrical characteristics. In this thesis I investigate effect of LDD doping on the CMOS compatible vertical MOSFETs structure. Electrical characteristics of 100nm vertical MOSFET is investigated for different values of LDD and body doping values. It is found that with the increase of LDD doping drive current of vertical MOSFET increases whereas subthreshold performance is degraded. The degradation of sub-threshold performance is found to be more prominent at low body doping values. In addition to this threshold voltage of vertical MOSFETs are found to decrease with the increase of LDD doping. These effects are explained by the reduction of the effective channel lengths and decrease in the source/ drain series resistances with the increase of LDD doping values. These results are very significant for choosing appropriate body doping and LDD doping values for fabricating 100nm CMOS compatible vertical MOSFETs.