Calculation of trapped charge in the silicon dioxide layer of an enhancement type MOSFET using impurity trap levels

dc.contributor.advisorKhan, Dr. M. Rezwan
dc.contributor.authorSaiful Islam, Syed
dc.date.accessioned2016-06-22T04:20:55Z
dc.date.available2016-06-22T04:20:55Z
dc.date.issued1996-04
dc.description.abstractFor abstracts please see full text
dc.identifier.otherhttp://lib.buet.ac.bd:8080/xmlui/handle/123456789/3337
dc.identifier.urihttp://lib.buet.ac.bd:8080/xmlui/handle/123456789/3337
dc.language.isoen
dc.publisherDepartment of Electrical and Electronic Engineering, BUET
dc.sourceBUET Institutional Repository
dc.subjectCalculation - Trapped charge - Silicon dioxide layer - Enhancement - MOSFET- Impurity trap - Level
dc.titleCalculation of trapped charge in the silicon dioxide layer of an enhancement type MOSFET using impurity trap levels
dc.typeThesis-MSc

Files

Original bundle

Now showing 1 - 1 of 1
Thumbnail Image
Name:
Full Thesis .pdf
Size:
860.82 KB
Format:
Adobe Portable Document Format