Single phase switch mode cycloconverters

Abstract

This thesis proposes new single phase cycloconverters based on switch mode topologies. Boost, Buck-Boost and Ćuk switch mode schemes are employed to control the output voltages. The proposed cycloconverters provide control in terms of both frequency and amplitude of the output voltage. The design of the proposed circuits is divided into two steps. First, the input AC signal is made unidirectional by employing full bridge rectifier. Based on the requirement of frequency and amplitude of the voltage at the load, this unidirectional voltage either applied on the same side or on opposite side of the load. The proposed topologies consist of two SMPS based converters namely the P and the N converters that are connected across the load. Input AC chopping at high frequency provides switched AC current that requires small filter to make the current waveform nearly sinusoid and in phase with input voltage. As a result, the input current THD reduces and the power factor improves. High frequency switch mode conversion for both positive and negative cycles of the input signal achieves this goal. Switch mode schemes in the P and N converters provide high frequency switching of the input current and thereby ensuring low input current THD and high input power factor which are the two desirable power quality criteria for power electronic converters. Compared to conventional 8 SCR cycloconverters the proposed topologies are able to provide output voltages both higher and lower than the supply. Depending on the load demand it is possible to offer output frequencies higher or lower than the input signal. Moreover, the proposed topologies have reduced number of switches. The numbers of solid state switches for each converter are two and in total each of the proposed topologies consist four switches. This reduction of switches has incorporated some advantages in the switch mode cycloconverters. First, the reduction of switch count has reduced the switching losses. Consequently the efficiency of proposed converters is increased. Second, less number of isolation schemes will be required in the proposed circuits. Third, the number of signal drives is reduced and finally, the proposed topology has higher reliability as the number of switches is reduced.