To Improve HiSIM-SOI for Real Application

dc.contributor.author	Bhuyan, Muhibul Haque
dc.contributor.author	Mattausch, Mitiko Miura-
dc.date.accessioned	2022-08-22T05:07:09Z
dc.date.available	2022-08-22T05:07:09Z
dc.date.issued	2004-03-31
dc.description	This work was done when I was working there as a CoE Researcher.
dc.description.abstract	SOI-MOSFET is a candidate for next generation integrated circuit technology due to its reduced junction capacitances and improved subthreshold swing. However, to utilize the technology for circuit application, a robust circuit model is needed. A complete surface-potential-based fully depleted SOI-MOSFET model for circuit simulation has been developed by our group and is named HiSIM-SOI [1, 2]. This model considers device features explicitly as well as preserves the charge conservation. To improve HiSIM-SOI for real application is the purpose of this present work.
dc.identifier.citation	M. H. Bhuyan and M. M.-Mattausch, “To Improve HiSIM-SOI for Real Application,” Hiroshima University Annual Research Report, pp. 100-101, March 2004. URL: www.rcns.hiroshima-u.ac.jp/21coe/pdf/2004.../102_104_muhibul.pdf
dc.identifier.other	http://dspace.aiub.edu:8080/xmlui/handle/123456789/728
dc.identifier.uri	http://dspace.aiub.edu:8080/jspui/handle/123456789/728
dc.language.iso	en_US
dc.publisher	Hiroshima University
dc.source	AIUB Institutional Repository
dc.subject	HiSIM-SOI
dc.subject	SOI-MOSFET
dc.title	To Improve HiSIM-SOI for Real Application
dc.type	Article

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