Energy Efficient Instruction Register for Green Communication

Abstract

Our work represents the interfacing of instruction register with FPGA. In this work we have taken three different FPGA of Virtex family that are Virtex 4, Virtex 5 and Virtex 6 and have observed the power variation of instruction register with this three FPGA. This experiment is done on a Xilinx 14.1 ISE design suite. And the power of instruction register with three FPGA is analyzed with an X Power tool. All the other chips power which is implanted on instruction register counts zero in total, dynamic and quiescent power consumption. In this experiment, only one LUT flip flop pair is used. On comparing the power of instruction register with the three FPGA of Virtex family, we concluded that 90 nm Virtex-4 FPGA requires the least power among all the three FPGA.