Browsing by Author "Ahmad, R Badlishah"

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    A Meta Heuristic Search based T-way Event Driven Input Sequence Test Case Generator
    (United Kingdom Simulation Society, 2014) Rahman, Mostafijur; Othman, Rozmie Razif; Ahmad, R Badlishah; Rahman, Md. Mijanur
    Exhaustive testing for event driven sequence input interaction is costly and not always practicable for all types of software testing. So, an alternative technique is crucial where optimum/near optimum test case generation is key concern. This paper presents a feasible test suite generation technique using a meta heuristic search called Simulated Annealing (SA) for T-way Event Driven Input Sequence Test Case (EDISTC) Generator and abbreviated as T-way EDISTC-SA generator. The T-way EDISTC-SA technique focuses on a heuristic analysis for generating feasible and near optimum test suite(s), where a cost function carefully initiates acceptable test input sequences and a fine-tuned cooling rate with temperature takes part as an iterative perspective. We corroborate on EDISTC-SA algorithm by doing a number of experiments to achieve optimum and/or near optimum test cases from a number of test input sequences. The experimental results are tested on a real application called Embedded Network Traffic Monitoring System (ENTM). Analysis on EDISTC-SA strategy shows that the optimum test suite is found from some of the iterated solution and there is possibility to have more feasible accepted test suites. Full Text Link: http://doi.org/10.5013/IJSSST.a.15.03.10
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    Performance evaluation of rank sort parallelism
    (IEEE Xplore, 2013-03-21) Turner, Jamie S. C.; Rahman, Mostafijur; Ahmad, R Badlishah
    Parallelism performance is a crucial part for testing algorithmic design in various platforms (not only on multiprocessor but also on multi-computer processor systems). In this paper we demonstrate a comparative parallelism performance outcome from Rank sort algorithm and then compare the parallel and sequential approach of the Rank sort. The divide and conquer approach is used to control a large problem into pieces (called tasks) and send the tasks to some inter-process/multi-computer processor systems for doing some computations and return back the results to the master computer. The master computer then combines all the tasks from working computer and displays the final result. In this research the execution time, speedup time and efficiency matrices are used to find the barrier of Rank sort parallelism. Full Text Link: http://doi.org/10.1109/ISTT.2012.6481596
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    Test case generation for event driven systems using 4-way input test strategy
    (IEEE Xplore, 2016-04-11) Rahman, Mostafijur; Othman, Rozmie Razif; Ahmad, R Badlishah; Rahman, Md. Mijanur
    Since 1990's Combinatorial explosion is a crucial topic in software testing domain. In this domain the exhaustive input interaction test is not practical solution to test all software configurations for generating test cases. T-way test strategy provides a solution to overcome the problem. To date, most of the research on designing methods focus on combinations of input parameter values, where the T-way test strategy is applied to generate final test cases. However the methods are not applicable for event driven systems, where inputs are tested in the ordered form. In this paper a new method is proposed on T-way strategy to generate test cases using 4-way input interaction technique. The generated test cases are compared with the existing 4-way strategies. Result shows that in most cases the proposed method is able to generate efficient test cases compared with existing 4-way methods. Full Text Link: http://doi.org/10.1109/SCORED.2015.7449422